03.019 How can I modify my ZipGS for more cache and more speed?
Description
This article is from the Apple II Csa2 FAQ, by Jeff Hurlburt with numerous contributions by others.
03.019 How can I modify my ZipGS for more cache and more speed?
The process described below is very simple. It aims for a speed of 12.5MHz
(or better) with 64k cache.
First, you will need one of the new Western Design Center 14MHz 65C816's.
Students, teachers, and professors can order the IC in single quantities
directly from WDC ( http://www.wdesignc.com ). Otherwise, the minimum order is
$100. Price is about $20 each.
Adaptors: Nearly all of the newer, faster 32k x 8 SRAMs are in skinny 300-
mil packages. If you would rather not modify your ZipGS for the skinny SRAMs,
Digi-Key stocks 28-pin 300-mil to 600-mil adapter sockets from Aries
Electronics for about $12 each (Aries no. 1106396-28). You can plug a 28 pin
SRAM into the 300-mil adapter socket and the adapter in turn plugs into the
600-mil socket on the Zip. (If you have some spare sockets lying around, you
can build your own cheap, but that's another story.)
2-4 32k x 8 SRAM chips: There are many sources for 32k x 8 SRAMs and
several types that will work. I got mine (HM62832-15, $5 each) from JDR
Microdevices. You'll want 15ns in the Tag RAM sockets. Up to around 12.5MHz,
you want 70ns or faster Data RAM. If current cache size is 64k, your old TAG
RAM chips will, usually, work as Data RAM and can be transferred to the Data
sockets. Otherwise, go ahead and get two 25ns-35ns 32k x 8 SRAM chips for the
Data RAM.
Data RAM should always be slower than Tag RAM. Barry Rees posted his
experiences on this matter (that Data should be significantly slower than Tag)
and I found that the original Tag chips were fast enough.
A "full size" oscillator module: Digi-Key, JDR, Mouser, ... have these.
Divide oscillator speed by four to get Zip speed. JDR has the OSC50.0 (50MHz
oscillator), which will make a 12.5MHz Zip. The oscillators are cheap enough to
get two or three for experimenting with higher speeds.
So, you just plug your Tag and Data RAM chips into the Digi-Key adapters
and plug the adapters into the Tag and Data sockets of the Zip. Then, you
install the new 65C816 and oscillator and make sure DIP switch 1-7 and 1-8 are
both set OFF (for 64k cache). That's it, done completely without soldering.
ZipGS boards vary. On some you may be able to go above 12.5MHz by just
plugging in a faster oscillator. On others, you may have to choose between
getting faster Data RAM or settling for a lower speed. The new 65C816 is rated
for 16MHz and many users have gone to 14MHz and above. For speeds above
12.5MHz, the usual recommendation is to get Data RAM rated at 35ns or better.
For a step-by-step guide, download my ZipUpgrade.SHK HyperCard stack at
ftp://ground.ecn.uiowa.edu/apple2/apple16/Hypermedia/Hypercard/ .
----------------------------
By: Wayne Stewart
I've sped up several ZipGS's and always topped out at 12 or 12.5MHz until
I replaced the 74F00 on the board with a 74HC00. I'd strongly suggest taking
the ZipGS as far as you can with plug-in parts, which'll likely be to about
12MHz; then, give the 74HC00 swap-in some thought.
By: Scott G. and Andrew Roughan
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