ETHERLINK II TP (3C503; ASSY.#6330) Network Card Settings and Configuration
3COM CORPORATION
ETHERLINK II TP (3C503; ASSY.#6330)
NIC Type | Ethernet |
Transfer Rate | 10Mbps |
Data Bus | 8-bit ISA |
Topology | Star |
Wiring Type | Unshielded twisted pair DIX transceiver via DB-15 port |
Boot ROM | Available |
DC CONVERTER | ||
Setting | JP1 | |
| » | DC signal disabled (10BaseT standard) | Pins 2 & 3 Closed |
DC signal enabled (non 10BaseT network) | Pins 1 & 2 Closed | |
TRANSMIT LEVEL | ||
Setting | JP2 | |
| » | Transmit level select normal (10Base-T standard) | Pins 2 & 3 Closed |
Transmit level select low (non 10Base-T network) | Pins 1 & 2 Closed | |
RECEIVE LEVEL | ||
Setting | JP3 | |
| » | Receive level select normal (10Base-T standard) | Pins 1 & 2 Closed |
Receive level select low (non 10Base-T network) | Pins 2 & 3 Closed | |
TRANSCEIVER EQUALIZATION | |||
Setting | JP4 | JP5 | |
| » | Transmitter Equalization enabled (10Base-T standard) | Closed | Open |
Receiver Equalization enabled (non 10Base-T network) | Open | Closed | |
TWISTED PAIR IMPEDANCE | ||||
Impedance | JP6 | JP7 | JP8 | JP9 |
75ohm | Pins 1 & 2 | Pins 1 & 2 | Pins 1 & 2 | Pins 1 & 2 |
100ohm | Pins 2 & 3 | Pins 2 & 3 | Pins 2 & 3 | Pins 2 & 3 |
150ohm | Pins 3 & 4 | Pins 3 & 4 | Pins 3 & 4 | Pins 3 & 4 |
BOOT ROM ADDRESS | |||||
Address | JP10 | JP11 | JP12 | JP13 | JP14 |
Disabled | Closed | Open | Open | Open | Open |
C8000h | Open | Open | Open | Open | Closed |
CC000h | Open | Open | Open | Closed | Open |
D8000h | Open | Open | Closed | Open | Open |
DC000h | Open | Closed | Open | Open | Open |
I/O BASE ADDRESS | ||||||||
Address | JP15 | JP16 | JP17 | JP18 | JP19 | JP20 | JP21 | JP22 |
250h | Open | Open | Open | Open | Closed | Open | Open | Open |
280h | Open | Open | Open | Open | Open | Closed | Open | Open |
2A0h | Open | Open | Open | Open | Open | Open | Closed | Open |
2E0h | Open | Open | Open | Open | Open | Open | Open | Closed |
300h | Closed | Open | Open | Open | Open | Open | Open | Open |
310h | Open | Closed | Open | Open | Open | Open | Open | Open |
330h | Open | Open | Closed | Open | Open | Open | Open | Open |
350h | Open | Open | Open | Closed | Open | Open | Open | Open |
LINK INTEGRITY TEST | ||
Setting | JP23 | |
| » | Enabled | Pins 2 & 3 Closed |
Disabled | Pins 1 & 2 Closed | |
Note:Link Integrity is only used with 10Base-T wiring. When using an AUI transciever, the test should be disabled. | ||
DIAGNOSTIC LED(S) | ||
LED | Status | Condition |
L1 | On | Data is being transmitted or received |
L1 | Off | Data is not being transmitted or received |
L2 | On | Twisted pair network connection is good |
L2 | Off | Twisted pair network connection is broken |
MISCELLANEOUS NOTES |
The interrupt request and cable type are set using the software that comes with the card. |
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