TMC RESEARCH CORPORATION
PAT34PV
Processor | 80386DX/CX486DLC/80486SX/80487SX/80486DX/ODP486SX 80486DX2/ODP586SX |
Processor Speed | 25/33/40/50(internal)/50/66(internal)MHz |
Chip Set | OPTI |
Max. Onboard DRAM | 32MB |
Cache | 64/128/256KB |
BIOS | AMI |
Dimensions | 235mm x 220mm |
I/O Options | None |
NPU Options | 80387 |

CONNECTIONS | |||
Funcation | Location | Purpose | Location |
External battery | J1 | Reset switch | J5/pins 9 & 19 |
Speaker | J5/pins 1 - 4 | IDE interface LED | J5/pins 10 & 20 |
Turbo switch | J5/pins 7 & 17 | Power LED & keylock | J5/pins 11 - 15 |
Turbo LED | J5/pins 8 & 18 | IDE interface LED | J6 |
USER CONFIGURABLE SETTINGS | |||
Function | Location | Setting | |
» | Monitor type select color | JP1 | closed |
| Monitor type select monochrome | JP1 | open |
» | CMOS memory normal (internal battery) | JP2 | pins 2 & 3 closed |
| CMOS memory normal (external battery) | JP2 | open |
| CMOS memory clear | JP2 | pins 1 & 2 closed |
» | Factory configured - do not alter | JP3 | N/A |
» | VESA bus speed select £ 33MHz | JP4 | open |
| VESA bus speed select > 33MHz | JP4 | closed |
» | VESA bus wait states select 0 (CPU £ 33MHz) | JP5 | open |
| VESA bus wait state select 1 (CPU > 33MHz) | JP5 | closed |
DRAM CONFIGURATION | ||
Size | Bank 0 | Bank 1 |
1MB | (4) 256K x 9 | NONE |
2MB | (4) 256K x 9 | (4) 256K x 9 |
4MB | (4) 1M x 9 | NONE |
5MB | (4) 256K x 9 | (4) 1M x 9 |
8MB | (4) 1M x 9 | (4) 1M x 9 |
16MB | (4) 4M x 9 | NONE |
20MB | (4) 1M x 9 | (4) 4M x 9 |
32MB | (4) 4M x 9 | (4) 4M x 9 |
CACHE CONFIGURATION | |||
Size | Cache | Location | TAG(U39) |
64KB | (8) 8K x 8 | Banks 0 & 1 | (1) 8K x 8 |
128KB | (4) 32K x 8 | Bank 0 | (1) 8K x 8 |
256KB | (8) 32K x 8 | Banks 0 & 1 | (1) 32K x 8 |
CACHE RESISTOR NETWORK CONFIGURATION | |||
Size | RND | RNE | RNF |
64KB | closed | open | open |
128KB | open | closed | open |
256KB | open | open | closed |
CPU CONFIGURATION | |||||
CPU | RNA | RNB | RNC | RN386 | RN486 |
80486DX2 | closed | open | open | open | closed |
ODP487SX | open | closed | closed | open | closed |
80486DX | closed | open | open | open | closed |
80487SX | open | closed | open | open | closed |
80486SX | open | open | open | open | closed |
CX486DLC | N/A | N/A | N/A | closed | open |
80386DX | N/A | N/A | N/A | closed | open |
CPU SPEED RESISTOR NETWORK CONFIGURATION | |||||
Speed | RNG1 | RNG2 | RNG3 | RNG4 | RNG5 |
66(internal)MHz | N/A | N/A | open | closed | open |
50MHz | N/A | N/A | open | open | closed |
50(internal)MHz | N/A | N/A | closed | open | open |
50(internal)MHz | N/A | N/A | closed | open | open |
40MHz/486 | N/A | N/A | open | closed | open |
40MHz/386 | open | closed | open | closed | open |
33MHz/486 | N/A | N/A | open | closed | open |
33MHz/386 | closed | open | open | closed | open |
25MHz | N/A | N/A | closed | open | open |
VESA LOCAL BUS CONFIGURATION | ||
VESA cards supported | RNV1 | RNV2 |
2 | open | closed |
1 | closed | open |
Note:The manufacturer does not recommend using the two card setting with a 486DX/50MHz | ||