Hard Drive: HITACHI: DK221A-34 (1993) 340MB 2.5"/SSL ATA2 FAST
D K 2 2 1 A - 3 4 ( 1 9 9 3 ) HITACHI
NO MORE PRODUCED Native| Translation
------+-----+-----+-----
Form 2.5"/SUPERSLIMLINE Cylinders 1967| 692| |
Capacity form/unform 340/ MB Heads 4| 16| |
Seek time / track 13.0/ 4.5 ms Sector/track | 60| |
Controller IDE / ATA2 FAST/ENHA Precompensation
Cache/Buffer 64 KB LOOK-AHEAD Landing Zone 692
Data transfer rate 4.000 MB/S int Bytes/Sector 512
8.000 MB/S ext PIO2
Recording method RLL 1/7 operating | non-operating
-------------+--------------
Supply voltage 5 V Temperature *C 5 55 | -40 70
Power: sleep W Humidity % 19 90 | 8 90
standby W Altitude km 3.000| 12.000
idle W Shock g 100 | 150
seek 4.0 W Rotation RPM 4464
read/write W Acoustic dBA 34
spin-up W ECC Bit
MTBF h 300000
Warranty Month
Lift/Lock/Park YES Certificates
Layout
HITACHI DK211A-51/68/DK221A-34 SPECIFICATIONS K6600648 1993
----+---------------------------------------------------+-PCB-
| B D f 2 4 o o o o o o o o o o o o o o o o o o o 44|
| A C e 1 3 o o o o o o o o o o o o o o o o o o o 43|
+---------------------------------------------------+
Jumpers
HITACHI DK211A/221A SPECIFICATIONS K6600648 1993
Jumper Setting
==============
Master/Slave Setting
--------------------
When the drive is connected to the host bus, Master/Slave setting is
necessary to configure a drive as a master or a slave.
Master/Slave setting is established between drives on the interface
connector by using jumper 0-2 (pin# A,B,C).
The master drive is assigned to drive address 0, the slave drive is
assigned to drive address 1.
(1) Master (or single)
+43-------------------1---C-A-+ | o o ----------- o o o o o | If all of pin# A, B, C are open, | o o ----------- o o o o o | the drive is a master (or single). +44-------------------2---D-B-+
(2) Slave
+43-------------------1---C-A-+ | o o ----------- o o o o X | If Jumper Position A*B is used, | o o ----------- o o o o X | the drive is slave. +44-------------------2---D-B-+
(3) CSEL Selection
+43-------------------1---C-A-+
| o o ----------- o o o xxx | If Jumper Position A*C is used,
| o o ----------- o o o o o | Master/Slave setting is determinated
+44-------------------2---D-B-+ by the condition of CSEL signal
(pin# 28).
Connector Pin Assignments
-------------------------
Pin | Function | Pin | Function
-----+----------------+------+-----------
A | JUMPER 0 | B | JUMPER 1
C | JUMPER 2 | D | RESERVED
E | KEY (REMOVED) | F | KEY (REMOVED)
1 | RESET- | 2 | GND
3 | DD7 | 4 | DD8
5 | DD6 | 6 | DD9
7 | DD5 | 8 | DD10
9 | DD4 | 10 | DD11
11 | DD3 | 12 | DD12
13 | DD2 | 14 | DD13
15 | DD1 | 16 | DD14
17 | DD0 | 18 | DD15
19 | GND | 20 | KEY (REMOVED)
21 | DMARQ | 22 | GND
23 | DIOW- | 24 | GND
25 | DIOR- | 26 | GND
27 | IORDY | 28 | CSEL
29 | DMACK- | 30 | GND
31 | INTRQ | 32 | IOCS16-
33 | DA1 | 34 | PSIAG-
35 | DA0 | 36 | DA2
37 | CS1FX- | 38 | CS3FX
39 | DASP- | 40 | GND (MOTOR)
41 | 5VDC (LOGIC) | 42 | 5VDC (MOTOR)
43 | GND (LOGIC) | 44 | RESERVED
Description of the Interface Signals ------------------------------------ The interface is an ATA (IDE) interface. Reserved pins should be left unconnected. The following table shows the signal definitions. "I" of I/O type represents an input signal for the drive and "O" represents an input signal from the drive. +------------+-----+--------+---------------------------------------+ |Signal name | Pin |I/O type| Description | |RESET- | 1 | I | This is a reset signal output from the| | | | | host system and to be used for inter- | | | | | face logical circuit. | +------------+-----+--------+---------------------------------------+ |DD0-DD15 | 3-18| I/O | This is a 16 bit directional bus. The | | | | | lower 8 bits are used for register | | | | | access other than data register. | +------------+-----+--------+---------------------------------------+ |DIOW- | 23 | I | The rising edge of this Write Strobe | | | | | signal enables data from a register on| | | | | the drive. | +------------+-----+--------+---------------------------------------+ |DIOR- | 25 | I | Activating this Read Strobe signal | | | | | enables data from a register on the | | | | | drive to be clocked onto the host data| | | | | bus. The rising edge of this signal | | | | | latches data at the host. | +------------+-----+--------+---------------------------------------+ |IORDY | 27 | O | This signal is used to temporarily | | | | | stop the host register access (read or| | | | | write) when the drive is not ready to | | | | | respond to a data transfer request. | +------------+-----+--------+---------------------------------------+ |CSEL | 28 | I | This signal is used to configure a | | | | | drive as either Drive 0 or 1 when CSEL| | | | | mode is selected. This signal is | | | | | pulled up inside the drive. | | | | | +-----+--------------+ | | | | | |CSEL |Drive address | | | | | | +-----+--------------+ | | | | | |GND | 0 | | | | | | +-----+--------------+ | | | | | |OPEN | 1 | | | | | | +-----+--------------+ | +------------+-----+--------+---------------------------------------+ |INTRQ | 31 | O | This is an interruption signal for the| | | | | host system. This signal is asserted | | | | | by a selected drive when the nIEN bit | | | | | in the Device Control Register is "0".| | | | | In other cases, this signal should be | | | | | a high impedance state. | +------------+-----+--------+---------------------------------------+ |IOCS16- | 32 | O | This signal indicates to the host that| | | | | the 16 bis data port has been | | | | | addressed an a 16 bit word can be read| | | | | or written to the drive. | +------------+-----+--------+---------------------------------------+ |DA0-2 |33,35| I | This is a register address signal from| | | 36 | | the host system. | +------------+-----+--------+---------------------------------------+ |PDIAG- | 34 | I/O | This signal is asserted by Drive 1 to | | | | | indicate to Drive 0 that it has | | | | | completed diagnostics. This signal is | | | | | pulled up inside the drive. | +------------+-----+--------+---------------------------------------+ |CS1FX- | 37 | I | This drive chip selection signal is | | | | | used to select the Command Block | | | | | Registers from the host system. | +------------+-----+--------+---------------------------------------+ |CS3FX- | 38 | I | This drive chip selection signal is | | | | | used to select the Control Block | | | | | Registers from the host system. | +------------+-----+--------+---------------------------------------+ |DASP- | 39 | I/O | This signal indicates that a drive is | | | | | active or that Drive 1 is present | | | | | when power is turned on. | +------------+-----+--------+---------------------------------------+ |DMARQ | 21 | O | This signal, used for DMA data | | | | | transfers between host and drive, | | | | | shall be asserted by the drive when | | | | | it is ready to transfer data. | +------------+-----+--------+---------------------------------------+ |DMACK- | 29 | I | This signal shall be used by the host | | | | | in reponse to DMARQ to either | | | | | acknowledge that data has been | | | | | accepted, or that data is available. | +------------+-----+--------+---------------------------------------+
Install
HITACHI DK211A/221A SPECIFICATIONS K6600648 1993
Notes On Installation
=====================
Connector --------- This device has 2mm pitch interface connector which contains a power line. The connector part list is shown in the following table. +--------------------+-----------------+----------------------+ |Interface cable side| Signal Connector| molex 87259-4413 | | | Receptacle | or equivalent | | +-----------------+----------------------+ | | Cable | AWG#28 or equivalent | +--------------------+-----------------+----------------------+ |Drive side | Signal Connector| molex 87400-5001 or | | | Plug | equivalent | +--------------------+-----------------+----------------------+
The I/O signal levels are as follows:
Input signal High level +2.0V Vcc+0.5V
Low level -0.5V 0.8V
Output signal High level +2.4V +5.25V or an open circuit
Low level +0.4V or less (IOL=2mA)
+0.5V or less (IOL=24mA)
The I/F cable should be no longer than 45.7cm (include the circuit
pattern length in the host system).
Features
HITACHI DK211A/DK221A SPECIFICATIONS K6600648 1993/1995
Introduction
------------
The DK211/221 series disk driv embodies large capacity such as 680MB,
510MB (19mm height) and 340MB (12.5mm height) in spite of the small
size (2.5 inch) by applying the latest high-density record
technology. It provides high performances such as 14ms of average
seeking time and up to 8MB of transmission rate (Pio mode2).
It also realizes high long-run reliability by reducing the number
of parts dramatically and controlling the quality severely. Compared
with 3.5 inch disk drives, the DK211/221 series disk drives improves
power consumption economy drastically. It supports the standard ATA
(IDE) interface.
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