Hard Drive: CONNER: CFA-540E 540MB 3.5"/SL SCSI2 FAST
C F A - 5 4 0 E CONNER
Native| Translation
------+-----+-----+-----
Form 3.5"/SLIMLINE Cylinders 2805| | |
Capacity form/unform 540/ MB Heads 4| | |
Seek time / track 12.0/ 3.0 ms Sector/track | | |
Controller SCSI2 SI/FAST/SCA Precompensation
Cache/Buffer 256 KB SEGMENTED Landing Zone
Data transfer rate 4.000 MB/S int Bytes/Sector 512
10.000 MB/S ext SYNC
Recording method RLL 1/7 operating | non-operating
-------------+--------------
Supply voltage 5/12 V Temperature *C 5 55 | -40 60
Power: sleep 0.9 W Humidity % 8 80 | 8 80
standby 1.0 W Altitude km -0.061 4.500| -0.061 4.500
idle 3.9 W Shock g 5 | 50
seek 5.0 W Rotation RPM 4500
read/write 4.8 W Acoustic dBA 38
spin-up W ECC Bit
MTBF h 300000
Warranty Month
Lift/Lock/Park YES Certificates
Layout
CONNER CFA-540E INSTALLATION NOTES
+---------------------------------------------------------+ | |+--+ | ||XX| | ||XX| | ||XX| | ||XX| | ||XX| | ||XX| | ||XX| | ||XX| | ||XX| | ||XX|SCA | ||XX| | ||XX| | ||XX| | |+--+ +---------------------------------------------------------+
Jumpers
CONNER CFA-540E/S NOTES ON INSTALLATION
Jumper Setting
==============
Setting the Drive's Jumpers - CFA540E
-------------------------------------
There are no jumpers to set on the model CFA540E drive since all the
necessary control signals are on the SCA connector. This drive is
intended for applications where the drive is configured at the
interface when the drive is plugged into the interface connector.
Setting the SCSI Bus Address - CFA540E
--------------------------------------
The SCSI bus ID of the drive is set by grounding the Interface bus
signals.
Disabling Spin-Up at Power On - CFA540E
---------------------------------------
Spin up upon application of power to the drive can be disabled by
grounding the RMT_START line on the interface. Disabling spin up on
application of power can also be enabled by setting the DSPN bit in
MODE SELECT page 00H (Operating Parameters). The Host must issue a
START UNIT command to cause the drive to spin up. Refer to the Eighth
Generation SCSI Technical Reference Manual for additional information
regarding the MODE SELECT and START/STOP UNIT commands.
Delaying Spin Up at Power On - CFA540E
--------------------------------------
Grounding the DLYD_START signal on the interface delays spin up on
power-up by the value of the drive's SCSI ID multiplied by 4 seconds
(i.e. SCSI ID 4 will delay 16 seconds). Delaying spin up on
application of power can also be enabled by setting the SDLY bit in
MODE SELECT page 00H (Operating Parameters). Refer to the Eighth
Generation SCSI Technical Reference Manual for additional information
regarding the MODE SELECT command.
Setting the SCSI Bus Address - CFA540S
--------------------------------------
There are three jumpers available for configuration of the SCSI ID:
ID0, ID1, and ID2.
An optional 2mm pin pitch right angle header is located on the front
of the PCBA (opposite the SCSI interface connector) which allows
changing the SCSI IDs while the drive is mounted in the system. The
header includes three pins, 0ID0, 0ID1 and 0ID2 which can
alternatively be used to select the SCSI Bus address. This connector
may also be used to cable the SCSI ID select to a remote switch. A
receptacle connector Amp P/N 111622-1 or equivalent can be used to
connect a ribbon cable to this header.
Disabling Spin-Up at Power On - CFA540S
---------------------------------------
A jumper in the E3 location, disables spin up after power-on for
applications where spin up sequencing is necessary. An optional 2mm
pin pitch right angle header is located on the front of the PCBA
(opposite the SCSI interface connector) which can alternatively be
used to disable spin up. Disabling spin up on application of power
can also be enabled by setting the DSPN bit in MODE SELECT page 00H
(Operating Parameters). The Host must issue a START UNIT command to
cause the drive to spin up.
Disabling SCSI Bus Terminator Power (TERMPWR) - CFA540S
-------------------------------------------------------
Power to the on-board terminators is provided by the higher of the
voltage supplied at Pin #26, J2 or the voltage level at the 5 Volt
power input to the drive minus one diode drop. Termination Power to
external terminators can be supplied by the drive through Pin #26,
J2. The signal output characteristics are described in chapter 5. The
TERMPWR line can be disconnected from the drive by removing Jumper
E1.
Setting the Bus Termination - CFA540S
-------------------------------------
This drive provides on-board Alternative 2 active termination for the
SCSI bus. The termination resistors, which are contained in two
Single Inline Packs (SIPs) should be removed from the drive unless it
is a SCSI device at the physical end of the bus.
CFA-540S ======== S1-S3 SCSI ID ------------- +----------+-----------------------+ | SCSI ID | Jumpers | | | S3 | S2 | S1 | +----------+-------+-------+-------+ | 0 | OPEN | OPEN | OPEN | +----------+-------+-------+-------+ | 1 | OPEN | OPEN | CLOSED| +----------+-------+-------+-------+ | 2 | OPEN | CLOSED| OPEN | +----------+-------+-------+-------+ | 3 | OPEN | CLOSED| CLOSED| +----------+-------+-------+-------+ | 4 | CLOSED| OPEN | OPEN | +----------+-------+-------+-------+ | 5 | CLOSED| OPEN | CLOSED| +----------+-------+-------+-------+ | 6 | CLOSED| CLOSED| OPEN | +----------+-------+-------+-------+ | 7 | CLOSED| CLOSED| CLOSED| +----------+-------+-------+-------+
Termination and Jumpers
-----------------------
E1 OPEN Terminator Power from Drive
CLOSED Terminator Power from Interface
Terminators T1, T2: Remove both unless the Drive is the last one
on the SCSI Cable.
NOTE:
SCSI PARITY IS ALWAYS ENABLED!
Install
CONNER CFA-540S/E NOTES ON INSTALLATION
Notes on installation
=====================
Installation direction
----------------------
horizontally vertically
+-----------------+ +--+ +--+
| | | +-----+ +-----+ |
| | | | | | | |
+-+-----------------+-+ | | | | | |
+---------------------+ | | | | | |
| | | | | |
| | | | | |
+---------------------+ | +-----+ +-----+ |
+-+-----------------+-+ +--+ +--+
| |
| |
+-----------------+
The drive will operate in all axis (6 directions).
Drive Assembly Housing
----------------------
The drive assembly housing, or Head-Disk Assembly (HDA) consists of a
die-cast aluminum base on which is mounted a die-cast aluminum cover.
Both the base and the cover are coated with a special material
designed to seal out contaminants which might degrade head and media
reliability. A gasket seals the joint between the base and cover to
retard the entry of moisture and environmental contaminants from the
assembly.
This assembly, the head-disk assembly, contains an integral 0.3
micron filter, which maintains a clean environment. Critical drive
components are contained within this contaminant-free environment.
Drive Motor and Spindle
-----------------------
A brushless DC direct-drive motor assembly is mounted on the drive's
base. The motor rotates the drive's spindle at 4500 RPM. The
motor/spindle assembly is dynamically balanced to provide minimal
mechanical runout to the disks. A dynamic brake is used to provide a
fast stop to the spindle motor and return the heads to the landing
zone when power is removed.
Head Positioning Mechanism
--------------------------
The read/write heads are supported by a mechanism coupled to a rotary
voice coil actuator.
Read/Write Heads and Disks
--------------------------
Data is recorded on 95mm diameter disks through 3370-type 70%
nano-slider thin film heads. The drive contains two sputtered thin
film disks with four data surfaces and four read/write heads.
At power-down, the heads are automatically retracted to the inner
diameter of the disk and are latched and parked on a landing zone
that is inside the data tracks.
Data Buffer
-----------
The data buffer (cache) utilizes two 256K x 8 Dynamic RAMs. Data path
integrity is ensured by appending a 4-byte CRC to blocks as they are
transferred from the interface to the buffer through Catalina. This
CRC is verified by the "Indy" buffer manager as blocks are
transferred from the buffer to the disk. A typical sector data field
consists of 512 bytes of data, 4 bytes of CRC and 11 bytes of Error
Detection And Correction (EDAC) code. The CRC is checked by Catalina
as blocks are transferred from the buffer to the interface. The CRC
is stripped from the block prior to sending it to the Host.
The SCSI interface functions are managed by the same Motorola 68HC16
microprocessor. Low SCSI transaction overhead is maintained by
automating common SCSI bus phase sequencing using a state machine in
the Catalina chip.
Read Look Ahead Code
--------------------
The Read Look Ahead RAM code executes commands sequentially as they
are received from the initiator(s). Commands from multiple initiators
may be queued and overlapped so that the subsequent command can be
parsed while the current command is being executed.
The drive's 256K byte buffer is configured as two segments. These
segments allow the drive to cache sequential data from two separate
areas on the disk. This can significantly improve performance in any
environment in which multiple disk files are kept open simultaneously
and operated upon in some interleaved fashion.
The Look-Ahead RAM code segments the 256 KB buffer into two 130K byte
(FCH blocks) segments. The remainder of the RAM is used by the
microprocessor as a scratch pad area and for non read or write data
information transfers. The buffer block size is equal to the data
block size (typically 512 B) plus the 4 bytes of buffer CRC appended
to each block.
Buffer operations default on Power-up to Read Look Ahead and Write
Caching enabled. MODE SELECT page 8, byte 2, bit 0 (RCD), when set to
one disables the read look-ahead cache function and bit 2 (WCE), when
set to zero disables write cache. In addition, MODE SELECT page 8,
byte 3 contains two fields which control the retention priority for
reads and writes. Refer to the Eighth Generation Disk Drive SCSI
Interface Manual for additional details.
When a read command is received by the disk drive, the cache tables
are searched to determine if the requested data is contained in
either cache segment (a cache hit). If there is no cache hit, the
Least Recently Used (LRU) segment is selected and a read from disk is
initiated into that segment which is now considered the Active
Segment. The retention of data already transferred to the host and
read look ahead in the Active Segment buffer is controlled by the
state of the Read Retention Priority values.
Read Look Ahead Buffer Management
---------------------------------
-The interface control firmware always initiates a "read forever"
command and the buffer segment is treated as a circular buffer. Data
is retained until the control firmware determines that it is no
longer needed or that performance would be improved if additional
blocks were prefetched. There are three different situations which
would be considered a cache hit on a subsequent read.
- Full: All of the requested data is cached in a buffer segment. If it is the Active Segment, the data will be transferred to the host and refilled with next sequential data. If the data in an Inactive Segment, the data is transferred to the host and retained.
- Partial: This is when some, but not all of the data is cached in a buffer segment. If the data is in the Active Segment, data is transferred to the host as the background process fills the buffer and the "read forever" is allowed to refill the buffer. If the data in an Inactive Segment, the cached data is transferred and a new read operation is initiated for the remaining data, making this the Active Segment.
- Potential: None of the data is cached. The active segment is checked and if the requested data is within a track of being read, the drive will allow the "read forever" operation to continue and the data is transferred to the host when it is available.
Write Caching
-------------
Write Caching allows multiple write commands operating on sequential
blocks to be written to the medium without losing a motor revolution
between commands. Write caching is enabled by setting the WCE bit in
MODE SELECT page 8 to one. The WCE bit is only valid while the Read
Look Ahead code is loaded. The WCE bit is ignored when the Tagged
Command Queuing code is in RAM because write coalescing will be
active.
The drive will send good status and command complete following the
data out phase of a cached write command. The drive will cache writes
when the following conditions are met:
- Two or more write commands (Op Code 0AH or 2A H ) execute consecutively without an intervening command.
- The write commands address consecutive logical block ranges.
- At least one logical block of data has been received in the buffer from the second write command in time to allow the medium to be written before an additional spindle revolution would be required.
- Both writes are from the same initiator.
- Neither write is a linked command.
If the drive encounters an error during a cached write operation, the
drive will respond by:
If AWRE (MODE SELECT page 01H ) is 0: the drive will report a CHECK
CONDITION on the next command and the response from a REQUEST SENSE
will be a deferred error. (Asynchronous event notification is not
supported by this drive.)
If AWRE (MODE SELECT page 01H ) is set to 1: the drive will attempt
to dynamically reassign the block of data and complete the operation.
If the reassignment fails, the drive will continue to reassign the
block until all the space in the grown defect list is filled (147
sectors, maximum).
Buffer Management
-----------------
The 256K byte buffer is treated by the queuing code as two 240KB
buffers (F0H sectors) to maximize coalescing. Look ahead reads are
performed by the drive when there are no commands in the queue
awaiting execution. Look ahead reads are not performed when there are
commands in the queue since another command will be waiting for
execution as soon as the current command completes and because the
queue affords pre-knowledge of subsequent commands instead of having
to anticipate them.
Mounting the Drive - CFA540E
----------------------------
The drive is designed to be used in applications where the unit may
experience shock and vibrations at greater levels than larger and
heavier disk drives will tolerate.
The design features which allow greater shock tolerance are the use
of rugged heads and media, a dedicated landing zone, closed loop
servo positioning and specially designed motor and actuator
assemblies.
Eight side, or four bottom base mounting points are provided to the
customer. The drive is mounted using 6-32 UNC -2B X 0.16 maximum
insertion length screws. The system integrator should allow
ventilation to the drive to ensure reliable drive operation over the
operating temperature range.
SCSI Bus Cable
--------------
The cable should meet the following guidelines, particularly with
FAST SCSI-2 systems:
- Do not route the data cable next to the drive PCB or any other high frequency or large current switching signals. Improper drive operation can result from improper cable routing.
- Cable stubs should not exceed 0.1 meter (4 inches).
- There should be 0.3 meters (12 inches) of cable between drives.
- The total cable length should not exceed 6 meters (20 feet) and may have to be reduced if a mixture of round and flat cable are used.
- Do not tightly bundle excess flat cable against each other since this promotes cross coupling of signals on the cable. Use spacers to maintain a minimum of 0.050 inches (1.27mm) gap between cable runs.
- Do not clamp the cable tightly against a metal chassis since this will degrade the signal. Use spacers or a non-flammable insulation material to maintain a gap between the chassis and the cable.
Spindle Synchronization
-----------------------
The spindle rotation of up to 35 drives may be synchronized together
by daisy chaining pin 1 to pin 1 and pin 2 to pin 2 on connector J3.
The spindles are synchronized using a "floating master" concept,
where the drives will synchronize to the first drive to reach full
speed. The synchronization tolerance is 1%.
Attaching Power to the Drive - CFA540S
--------------------------------------
The drive has a 4-pin DC power connector, J4 mounted on the PCB. The
recommended mating connector is AMP part number 1-480424-0 utilizing
AMP pins, part number 350078-4 or equivalent.
Mounting the Drive - CFA540S
----------------------------
The drive is designed to be used in applications where the unit may
experience shock and vibrations at greater levels than larger and
heavier disk drives will tolerate.
The design features which allow greater shock tolerance are the use
of rugged heads and media, a dedicated landing zone, closed loop
servo positioning and specially designed motor and actuator
assemblies.
Eight side, or four bottom base mounting points are provided to the
customer. The drive is mounted using 6-32 UNC -2B X 0.16 maximum
insertion length screws. The system integrator should allow
ventilation to the drive to ensure reliable drive operation over the
operating temperature range. The drive may be mounted in any
orientation.
CFA540E (WIDE, 80-pin Single Connector Attachment [SCA])
--------------------------------------------------------
External Terminator Power
-------------------------
The interface connector carries both power and ground so a separate
TERMPWR interface line is not provided.
Internal Termination
--------------------
This version of the drive has no on-board termination so the drive
must be externally terminated. Alternative 2 active termination is
recommended. Alternative 1 passive termination is not suitable for
this application.
Cable Requirements
------------------
This version of the drive is designed to interface directly to a
mating connector which is on a passive back plane or directly into a
motherboard. The same guidelines relative to impedance, stub length
and distance between stubs apply for SCSI bus signal reliability.
These guidelines may not be directly translated to a back plane
design so these design rules are to be viewed with respect to the
intended purpose of controlling reflections and the propagation of
signals down the bus. Since the characteristics for PCB signal traces
are affected by trace width, proximity to ground, and trace routing,
careful review of the back plane design and analysis of signal
quality is highly recommended.
Connector Requirements
----------------------
The drive's connector will mate with a AMP Champ 2-557103-1 vertical
receptacle or the AMP Champ 2-557101-1 right angle receptacle.
Power ----- Four +12 Volt signals provide the +12 volt power to the drive. The current return for the +12 volt power is through the +12 Volt Ground signals. The maximum current that can be provided to the drive through the +12 Volt signal pins is 3 Amperes. The supply current and return current must be distributed as evenly as possible among the pins. The maximum current is while the drive motor is starting.
Three +5 Volt signal pins provide +5 volt power to the drive. The current return for the +5 volt power is through the +5 Volt Ground pins. It is expected that the +5 Volt Ground will also establish the digital logic ground for the drive. The maximum current that can be provided to the drive through the +5 Volt signal pins is 2 Amperes. The supply current and return current must be distributed as evenly as possible among the pins.
Spindle Sync SCA
----------------
The spindle rotation of up to 35 drives may be synchronized together
by daisy chaining pin 1 to pin 1 and pin 2 to pin 2 of each drive on
connector J3. The spindles are synchronized using a "floating master"
concept, where the drives will synchronize to the first drive to
reach full speed. The synchronization tolerance is 1%.
LED Out ------- The LED out signal is driven by the drive when the drive is performing a SCSI operation. The LED out signal is designed to pull down the cathode of an LED. The anode is attached to the proper +5 volt supply through an appropriate current limiting resistor. The LED and the current limiting resistor are external to the drive.
Model CFA540S (Narrow, 50-pin SCSI)
-----------------------------------
External Terminator Power
-------------------------
Power to the on-board terminators is provided by the higher of the
voltage supplied at Pin #26, J2 or the voltage level at the 5 Volt
power input to the drive minus one diode drop. The diode prevents
back flow of current to the drive. Termination Power to external
terminators can be supplied by the drive through Pin #26, J2. The
TERMPWR line can be disconnected from the drive by removing Jumper
E8.
Cable Requirements
------------------
A 50 conductor cable no more than 6 meters (19.68 feet) cumulative
length with at least 28 AWG wire size and a characteristic impedance
of 70 to 100 ohms (84 ohms nominal) is required.
Connector Requirements
----------------------
The connector on the drive is a 50-position header which consists of
2 rows of 25 male pins on 0.100 inch centers.
Features
CONNER CFA-540S/E NOTES ON INSTALLATION
General
-------
This equipment generates and uses radio frequency energy and, if not
installed and used properly; that is, in strict accordance with the
manufacturer's instructions, may cause interference to radio and
television reception. It has been type tested and found to comply
with the limits for a Class B computing device in accordance with the
specifications in Part 15 of FCC Rules, which are designed to provide
reasonable protection against such interference in a residential
installation.
However, there is no guarantee that interference will not occur in a
particular installation. If this equipment does cause interference to
radio or television reception, which can be determined by turning the
equipment on and off, you are encouraged to try to correct the
interference by one or more of the following measures:
- Reorient the receiving antenna.
- Relocate the computer with respect to the receiver.
- Move the computer into a different outlet so that the computer and receiver are on different branch circuits.
Warning: Changes or modifications made to this equipment which have
not been expressly approved by Conner Peripherals, Inc. may cause
radio and television interference problems that could void the user's
authority to operate the equipment.
Further, this equipment complies with the limits for a Class B
digital apparatus in accordance with Canadian Radio Interference
Regulations.
The CFA540S and CFA540E are high performance 3.5-inch low-profile
(1.0 inch high) 540MB (formatted) disk drives. They offer 10.5
millisecond average seek time for Reading, 11.5millisecond seek time
for Writing, with an average latency of only 6.66ms. High capacity is
achieved by utilizing a zone density recording technique using 8
recording zones at an areal density of 205 Mbits per square inch.
These drives feature high performance while maintaining low power
consumption to reduce power supply current and system cooling
requirements in disk arrays.
Model Differences
-----------------
The drive models differ only in the host interface implementation:
CFA540E: SCSI 80-pin Wide Single Connector Attachment (SCA) interface
designed for applications such as Redundant Arrays in which the
drives are plugged directly into a backplane.
CFA540S: SCSI 50-pin standard interface designed for applications
which implement the standard SCSI-2 architecture.
The drives provide the following features:
- 256 KB segmentable cache buffer with adaptive cache management
- Tagged Command Queuing with Seek Re-ordering and Write/Read Coalescing
- Down-loadable Code through SCSI Interface
- SCSI-2 Compatibility
- 88 bit Reed-Solomon EDAC with on the fly error correction
- Microprocessor-controlled diagnostic routines execute at start-up
- Automatic Spindle Synchronization
- Active Termination with removable Resistor Packs
- Active Negation output drivers for greater interface reliability
- High performance rotary voice coil actuator with embedded servo system
- No thermal recalibration required to maintain performance levels
- High Shock resistance
- Automatic actuator latch against the inner stop upon power down with dedicated landing zone
- Sealed HDA
- 1,7 run length limited code
- Programmable Block Size (512 or 1024 bytes)
Electrical Design Features
Integrated Circuit
------------------
A single integrated circuit (IC) is mounted within the sealed hard
drive assembly in close proximity to the read/write heads. The IC
provides head selection, read pre-amplification, and write drive
circuitry.
Circuit Board
-------------
The drive's microprocessor-controlled circuit board provides the
remaining electronic functions, which include:
- read/write circuitry
- rotary actuator control
- interface control
- spin speed control
- auto-park
- power management
The processor is a 16-bit Motorola 68HC16. The entire data path
between the serializer-deserializer and the interface chip, including
the buffer (cache) is 8 bits wide to provide high data throughput.
The data buffer (cache) utilizes two 256K x 8 Dynamic RAMs. Data path
integrity is ensured by appending a 4-byte CRC to blocks as they are
transferred from the interface to the buffer through Catalina. This
CRC is verified by the "Indy" buffer manager as blocks are
transferred from the buffer to the disk. A typical sector data field
consists of 512 bytes of data, 4 bytes of CRC and 11 bytes of Error
Detection And Correction (EDAC) code. The CRC is checked by Catalina
as blocks are transferred from the buffer to the interface. The CRC
is stripped from the block prior to sending it to the Host.
The SCSI interface functions are managed by the same Motorola 68HC16
microprocessor. Low SCSI transaction overhead is maintained by
automating common SCSI bus phase sequencing using a state machine in
the Catalina chip.
Read/Write Channel
------------------
The Read/Write channel, in addition to the preamplifier discussed
earlier, consists of three integrated functions in a single IC:
- Pulse Detector
- Data Separator
- Time base Firmware
The drive's firmware can be considered in two parts. The first part
principally resides in the ROM for the 68HC16 processor. This
firmware is responsible for:
- starting the spindle motor and maintaining precise rotational speed
- controlling track following and actuator motion during seeking
- managing background R/W activity
- power management
- monitoring the overall health of the drive.
The interface control microcode resides in both ROM and RAM. The RAM
portion of the microcode can be upgraded in the field with the SCSI
Write Buffer command or through the drive's serial port.
The interface firmware functions include:
- Operating the Catalina SCSI controller
- reporting drive status and error conditions to the host
- manage operating parameters for the drive
- parsing the Command Descriptor Block and checking for illegal fields
- converting the LBA to CHS and initiating read and write operations to the background processor
- defect management
- serial port communications
Safety Standards
----------------
The drive is designed to comply with relevant product safety
standards, including:
- UL 478, 5th edition, Standard for Safety of Information Processing and Business Equipment - UL 1950, Standard for Safety of Information Technology Equipment - CSA 22.2 #220, Information Processing and Business Equipment - CSA 22.2 #950, Safety of Information Technology Equipment - IEC 380, Safety of Electrically Energized Office Machines - IEC 950, Safety of information Technology Equipment Including
Electrical Business Equipment
-----------------------------
- VDE 0805, VDE 0805 TIEL 100, and VDE 0806
- Complies with FCC Class B, Part 15, Subpart J
The drive operates in the following modes: - Read/Write Mode occurs when data is read from or written to the disk. The power consumption specified for this mode is an averaged value assuming a duty cycle of 35% read and 65% write.
- Seek Mode occurs when the actuator is in motion 100% of the time.
- Seek/Wr/Rd Mode simulates typical random write/read activity on the drive where seek has a 30% duty cycle.
- Idle Mode occurs when the drive is not reading, writing, or seeking. The motor is up to speed and the Drive Ready condition exists. The actuator is residing on the last-accessed track.
- Standby Mode occurs when the motor is stopped and the actuator is latched in the landing zone. The drive will enter Standby mode after power-on reset if the Disable Spin jumper is installed or the DSPN bit in MODE SELECT page 0 is set. A STOP UNIT command will also place a drive into Standby Mode. The drive will spin up and go into Idle mode when a START UNIT command is issued or on a timed basis by SCSI ID if the SDLY bit is set in MODE SELECT page 0.
- Spin-Up Mode occurs while the drive's spindle motor is being spun up to speed after initial power on or after exiting Standby Mode.
Error Correction
----------------
The drive uses a Reed-Solomon code to perform error detection and
correction. For each 512-byte block, the software error correction
polynomial is capable of correcting:
- one error burst of up to 22 bits in length
- two error bursts each up to 11 bits in length
Single bursts of 11 bits or less are corrected on the fly (OTF) with
no performance degradation. A larger defect up to 22 bits in length
or a second defect of up to 11 bits in length is corrected using
firmware within one latency period, after all retries have been
exhausted.
Downloadable Microcode
----------------------
The SCSI interface code is split into two functional parts which
executed from either ROM or RAM. The ROM code contains the boot-up
routines and supports commands such as INQUIRY, TEST UNIT READY,
REQUEST SENSE, START/STOP UNIT, etc., which may have to be responded
to prior to the RAM code being loaded from the disk. The RAM code
resides on an area of the disk which is reserved to the drive and is
not directly accessible through the interface. This code is read from
the disk and loaded into static RAM after power is applied and the
drive is able to read from the disk.
The RAM code consists of a resident portion which is loaded after a
Power On Reset. Two different versions of RAM code overlays also
reside on the disk. The Read Look Ahead code overlay is the default
and is loaded into RAM during the initial power-on sequence. If a
Queue Tag message is received by the drive, the drive will execute
the command and while it is in Status Phase, will read the Queuing
code overlay from the disk and load it into the RAM. This operation
takes about 600 milliseconds, after which the drive will complete the
command by sending the status. The drive will continue to operate
with Queuing code residing in RAM until the next Power-On sequence.
The RAM code may be upgraded on the disk via the factory serial port
or through the interface using the WRITE BUFFER command. Refer to the
WRITE BUFFER command in the Eighth Generation SCSI Interface Manual
for a discussion of the procedure.
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